1. Field of the Invention
This disclosure relates to a super junction structure semiconductor device with a structure to increase the breakdown voltage.
2. Description of Related Art
MOS transistors having a super junction (SJ) structure (hereinafter, referred to as SJMOSs), in which p-type columnar regions and n-type columnar regions are arranged next to each other, have characteristics of high breakdown voltage and low on-resistance (see Japanese Patent Application Publication No. 2000-277733, for example). In the SJ structure, the ratio of the total amount of impurities in the p-type columnar regions to that in the n-type columnar regions needs to be set to nearly one in order to completely deplete the drift region under reverse bias. To this end, in a semiconductor chip, the p-type and n-type columnar regions are regularly arranged in a certain repeated pattern.